Materials that are not available in bulk form are often fabricated by heteroepitaxy on substrates whose lattice parameter is not perfectly matched. This results in the formation of tensilely or compressively strained materials.
Moreover, when the thickness of the epitaxially grown material exceeds a threshold value, the strains due to the difference in lattice parameter from that of the substrate are such that the epitaxially grown material relaxes, forming dislocations in the crystal lattice during the epitaxy. These dislocations result in atom stacking faults in the volume of the material.
In the case of III/N materials, the dislocations generated by the relaxation are mainly oriented along an axis perpendicular to the plane of the surface of the material. These dislocations are called “through-dislocations,” as they pass through the thickness of the layer of the material. They have a deleterious effect on the performance and lifetime of components formed from these materials.
Finally, materials obtained by heteroepitaxy and rich in dislocations constitute poor seed substrates when they are used for a subsequent epitaxy, since the dislocations that they contain are transmitted to the subsequent epilayer.
Already known, from U.S. Patent Application Publication 2004/0192067, is a process for fabricating a heterostructure that includes a relaxed or partially relaxed useful layer on a substrate.
That process consists in transferring, onto a support, a layer of amorphous material, such as SiOxNy or SiO2, which may possibly contain dopant elements, such as boron or phosphorus, so as to modify the glass transition temperature of this material in order to make it viscous at the desired temperature. This layer of amorphous material is subjacent to a strained layer. Applying a heat treatment above the glass transition temperature, enabling the material to pass into the viscous state, causes partial or complete relaxation of the previously strained layer.
However, amorphous materials are electrical insulators. Consequently, the properties of the heterostructure obtained are not always optimized for all desired applications.
Moreover, this amorphous layer may contaminate other layers of the heterostructure or electronic devices fabricated thereon, by the diffusion of the dopant elements during subsequent heat treatments.